Virage Logic Libraries Power Kawasaki's Matrix ASIC Initiative

FREMONT, Calif., and TOKYO, Japan, March 15, 2004 - Until now, ASIC designers have generally been limited to one logic library per ASIC design. That changed today when Kawasaki Microelectronics announced its Matrix ASIC strategic initiative that enables customers to mix and match logic components from several different libraries to meet specific design objectives. All of the libraries currently offered by Kawasaki for this initiative come from Virage Logic Corp. (Nasdaq: VIRL), a leading provider of best-in-class semiconductor IP platforms. As a result of this initiative, designers can now mix and match libraries with different voltage thresholds and different cell heights. In addition, designers can mix standard cell libraries with metal programmable libraries for cost effective reversions and prototypes.

This multi-million dollar agreement grants Kawasaki wide access to Virage Logic's Area, Speed and Power (ASAP) Logic™ product portfolio for TSMC's and UMC's 0.13-micron and 90-nanometer processes with guaranteed support for future processes to come. All ASAP Logic libraries are based on Virage Logic's proprietary and patented routing methodology and cell architecture that has been used by semiconductor manufacturers worldwide over the last seven years. Each ASAP Logic library comes with hand-optimized architecture, circuit design and layout to meet specific design requirements such as desired performance, lowest power consumption, and minimized raw cell area. All libraries are correlated to silicon for maximum accuracy and predictability of results.

Specific libraries to be offered by Kawasaki include the ASAP Logic High-Density (HD) and Ultra-High-Density (UHD) standard cell libraries and the ASAP Logic HD and High-Speed (HS) Metal Programmable cell libraries. Virage Logic's ASAP Logic HD Library targets high performance design needs and typically delivers an increase of more than 20 percent in logic block area utilization. The ASAP Logic UHD Library delivers 30 percent area improvement while reducing dynamic power consumption 20 percent compared to conventional standard cell products. In addition, Virage Logic's ASAP Logic Metal Programmable cell libraries bring tremendous advantage in terms of cost management and design flexibility while having minimal impact on design area. Logic designed with metal programmable cell libraries can be functionally reprogrammed by changing only a few metal and via masks, saving hundreds of thousands of dollars by preserving all of the other masks.

"Given the important role libraries play in our Matrix ASIC initiative, our selection of Virage Logic as our library partner is very significant," said Hisaya Keida, general manager, Product Marketing and Development Department of Kawasaki. "In order to make this new initiative a success and a viable alternative for our customers, we needed to make sure that our libraries would be robust, silicon-proven and technologically advanced. Virage Logic provides all of those attributes and more." "The Matrix ASIC initiative is very forward-looking and demonstrates Kawasaki's commitment to advanced technology that really solves customers' design challenges," said Jim Ensell, Virage Logic's vice president of marketing. "It is extremely gratifying to know that Virage Logic's libraries are central to this innovative new approach."

About The Virage Logic ASAP Logic Products
ASAP Logic products contain application-optimized libraries targeted to unique market requirements and are based on Virage Logic's proprietary and patented routing methodology and cell architecture. ASAP Logic Metal Programmable Cell Libraries are used in System-on-Chip (SoC) designs to economically enable functional reprogrammability by changing only a few metal and via masks. ASAP Logic Standard Cell Libraries are optimized for area, speed, and power and provide up to a 30 percent increase in utilization when compared to conventional standard cell libraries.

About Kawasaki Microelectronics
Kawasaki Microelectronics is the leader in advanced yet affordable ASIC semiconductor technology solutions. The company's innovative core technologies and world-class design support are used in the consumer electronics, computer, office-automation, networking, wireless, and electronic-storage markets. The company is an active participant in industry standards organizations, including the Network Processing Forum (NPF), Optical Internetworking Forum (OIF), PCI Special Interest Group (PCI-SIG), USB Implementers Forum, MPEG Industry Forum (MPEGIF), Mobile Computing Promotion Consortium (MCPC), the Bluetooth Special Interest Group, and the Digital Display Working Group (DDWG). Kawasaki has design centers in Boston, Osaka, San Jose, Taipei, and Tokyo. For more information, contact the company at 408-570-0555, or visit its English-language web site at http://www.klsi.com/, its Japanese-language web site at http://www.k-micro.com/, or e-mail to info@k-micro.com.

About Virage Logic
Virage Logic Corporation (Nasdaq:VIRL) is a leading provider of best-in-class semiconductor IP platforms based on memory, logic, and I/Os that are silicon-proven and production ready. Virage Logic meets market demands for cost reduction, while improving performance and reliability for fabless and integrated device manufacturer (IDM) companies focused on the consumer, communications and networking, handheld and portable, and computer and graphics markets. Virage Logic is headquartered in Fremont, California and has sales and support offices worldwide. For more information, visit www.viragelogic.com or call (877) 360-6690 toll free or (510) 360-8000. Virage Logic's Tokyo, Japan office can be reached by calling +81-3-5403-4751.

SAFE HARBOR STATEMENT FOR VIRAGE LOGIC UNDER THE PRIVATE SECURITIES LITIGATION REFORM ACT OF 1995:
Statements made in this news release other than statements of historical fact are forward-looking statements, including, for example, statements relating to Virage Logic's business outlook, new products and new relationships. Forward-looking statements are subject to a number of known and unknown risks and uncertainties, which might cause actual results to differ materially from those expressed or implied by such statements. These risks and uncertainties include Virage Logic's ability to maintain and develop new relationships with third-party foundries, adoption of technologies by semiconductor companies and increases in the demand for their products, the company's ability to overcome the challenges associated with establishing licensing relationships with semiconductor companies, the company's ability to obtain royalty revenues from customers in addition to license fees, business and economic conditions generally and in the semiconductor industry in particular, competition in the market for embedded memories and other risks including those described in the Company's Annual Report on Form 10-K for the period ended September 30, 2002, filed with the Securities and Exchange Commission (SEC) on December 16, 2002, and in Virage Logic's other periodic reports filed with the SEC, all of which are available from Virage Logic or from the SEC's website (www.sec.gov), and in press releases and other communications. Virage Logic disclaims any intention or duty to update any forward-looking statements made in this news release.

For more information contact:

Virage Logic
Sabina Burns
Virage Logic Corporation
510-743-8115
sabina.burns@viragelogic.com

Kawasaki
Sacha Arts
Slider & Associates
408-356-3099
sacha@sliderassociates.com

Kerry McClenahan
McClenahan Bruer Communications
503-546-1002
kerry@mcbru.com